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//Copyright(C) 正点原子 2018-2028
//All rights reserved	                               
//----------------------------------------------------------------------------------------
// File name:           read_rom
// Last modified Date:  2022/7/11 14:30:36
// Last Version:        V1.1
// Descriptions:        uart_demo读rom模块
//----------------------------------------------------------------------------------------
// Created by:          正点原子
// Created date:        2022/7/11 10:10:36
// Version:             V1.0
// Descriptions:        The original version
//
//----------------------------------------------------------------------------------------
//****************************************************************************************//

module read_rom(
	input				sys_clk,                //系统时钟
	input				sys_rst_n,              //复位，低电平有效    
	
	input				start_read,             //读状态标志 
                                                
	output	reg	[4 :0]	rom_point,              //rom寻址
	output	reg			send_en                 //发送使能
);

//reg define
reg	  [15:0]    rom_cnt;         //rom计数器
reg   [25:0]    rom_clk;         //rom时钟
reg             clk_flag;        //rom时钟标志位 

//*****************************************************
//**                    main code
//*****************************************************
//rom分频出一个10ms的计数器                  
always @(posedge sys_clk or negedge sys_rst_n) begin
    if(!sys_rst_n) begin
        rom_clk <= 26'd0;
        clk_flag <= 1'b0;
    end
    else if(rom_clk == 26'd500_000) begin
        rom_clk <= 26'd0;
        clk_flag <= ~clk_flag;
    end
    else begin
        rom_clk <= rom_clk + 1'b1;
    end
end

//rom的读地址计数器
always @ (posedge sys_clk or negedge sys_rst_n) begin
    if(!sys_rst_n)
        rom_cnt <= 16'd0;
    else if(rom_cnt == 16'd24_999)
        rom_cnt <= 16'd0;
    else
        rom_cnt <= rom_cnt + 1'b1;
end

//当进入读状态开始后，进行rom寻找20位地址以及寻址完成后对发送端的发送
always @ (posedge sys_clk or negedge sys_rst_n) begin
	if(!sys_rst_n) begin
		rom_point <= 5'd0;
		send_en <= 1'b0;
	end
	else if(start_read && clk_flag && rom_point < 5'd20 && rom_cnt == 16'd1) begin
		rom_point <= rom_point + 1'b1;
		send_en <= 1'b1;
	end
	else if(start_read == 1'b0 && rom_point == 5'd20 && clk_flag == 1'b0) begin
		rom_point <= 5'd0;
		send_en <= 1'b0;
	end
	else begin
		rom_point <= rom_point;
		send_en <= 1'b0;
	end
end

endmodule